Invention Grant
- Patent Title: Fabrication methods of forming cylindrical vertical SI etched channel 3D switching devices
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Application No.: US15857358Application Date: 2017-12-28
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Publication No.: US10347822B1Publication Date: 2019-07-09
- Inventor: Gian Sharma , Amitay Levi , Andrew J. Walker , Kuk-Hwan Kim , Dafna Beery
- Applicant: Spin Memory, Inc.
- Applicant Address: US CA Fremont
- Assignee: SPIN MEMORY, INC.
- Current Assignee: SPIN MEMORY, INC.
- Current Assignee Address: US CA Fremont
- Agency: Zilka-Kotab, P.C.
- Main IPC: H01L27/22
- IPC: H01L27/22 ; H01L43/02 ; H01L43/12

Abstract:
A method of forming a cylindrical vertical transistor; the method, according to one embodiment, includes: forming a cylindrical pillar from a single block of silicon, forming an oxide layer over an exterior of the cylindrical pillar and exposed surfaces of the block of silicon, coating the oxide layer with a spin-on-glass (SOG), depositing a source mask over a majority of the SOG coating, and removing a portion of the SOG coating and underlying oxide layer, where the portion removed is defined by the source mask. Other systems and methods are also described in additional embodiments herein which provide various different improved processes of forming the cylindrical gate contacts, the source contacts, and/or the drain contacts for vertical transistor structures which also include the aforementioned cylindrical pillar channel structures and cylindrical gate in comparison to conventional surface transistor structures.
Public/Granted literature
- US20190207081A1 FABRICATION METHODS OF FORMING CYLINDRICAL VERTICAL SI ETCHED CHANNEL 3D SWITCHING DEVICES Public/Granted day:2019-07-04
Information query
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