A differential output circuit includes: input transistors that receive differential input signals; n stages of cascode transistors (n≥2) cascode connected to the input transistors; output terminals connected to the drains of n-th stage cascode transistors; an intermediate potential generating circuit that supplies an intermediate potential of potentials of the output terminals to the gates of the n-th stage cascode transistors; and a dividing circuit that supplies divided potentials resulting from the intermediate potential being divided into (n−1) stages to the respective gates of the (n−1)-th through first stages of the cascode transistors in descending order of potential.