Invention Grant
- Patent Title: Resistor array, output buffer, and manufacturing method for semiconductor device
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Application No.: US15474168Application Date: 2017-03-30
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Publication No.: US10348291B2Publication Date: 2019-07-09
- Inventor: Seiichiro Sasaki
- Applicant: LAPIS Semiconductor Co., Ltd.
- Applicant Address: JP Yokohama
- Assignee: LAPIS Semiconductor Co., Ltd.
- Current Assignee: LAPIS Semiconductor Co., Ltd.
- Current Assignee Address: JP Yokohama
- Agency: Rabin & Berdo, P.C.
- Priority: JP2016-070996 20160331
- Main IPC: H03K5/00
- IPC: H03K5/00 ; H03K17/16 ; H01L49/02 ; H03K19/00 ; H03F1/56 ; H03F3/21
Abstract:
A resistor array made of a semiconductor includes a plurality of resistor groups and a common line that electrically connects the M-th resistors of the plurality of resistor groups. Each resistor group includes first to M-th resistors connected in series, M being an integer of 2 or greater, and at least one short-circuit line, each short-circuiting at least one, but not all, of the M resistors.
Public/Granted literature
- US20170288658A1 RESISTOR ARRAY, OUTPUT BUFFER, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE Public/Granted day:2017-10-05
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