Invention Grant
- Patent Title: Level shift circuit
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Application No.: US15826047Application Date: 2017-11-29
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Publication No.: US10348305B2Publication Date: 2019-07-09
- Inventor: Hideyuki Sawai , Masakazu Sugiura
- Applicant: SII Semiconductor Corporation
- Applicant Address: JP Chiba
- Assignee: ABLIC INC.
- Current Assignee: ABLIC INC.
- Current Assignee Address: JP Chiba
- Agency: Brinks Gilson & Lione
- Priority: JP2017-005908 20170117
- Main IPC: H03L5/00
- IPC: H03L5/00 ; H03K19/0185 ; H03K19/003

Abstract:
Provided is a level shift circuit capable of converting a negative voltage level as well as a positive voltage level. The level shift circuit includes a switching transistor between an input transistor and a load, the switching transistor including a gate connected to a voltage source, and an input negative voltage level is converted into a second negative voltage level based on a voltage of the voltage source and a threshold voltage of the switching transistor.
Public/Granted literature
- US20180205378A1 LEVEL SHIFT CIRCUIT Public/Granted day:2018-07-19
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