Invention Grant
- Patent Title: Vertical fin-type devices and methods
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Application No.: US15878478Application Date: 2018-01-24
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Publication No.: US10361293B1Publication Date: 2019-07-23
- Inventor: Tsung-Che Tsai , Alain F. Loiseau , Robert J. Gauthier, Jr. , Souvick Mitra , You Li , Mickey H. Yu
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Gibb & Riley, LLC
- Agent Anthony J. Canale
- Main IPC: H01L29/74
- IPC: H01L29/74 ; H01L29/868 ; H01L23/535 ; H01L21/761 ; H01L29/66 ; H01L21/768 ; H01L29/06 ; H01L27/02

Abstract:
Disclosed is an integrated circuit (IC) structure that incorporates a string of vertical devices. Embodiments of the IC structure include a string of two or more vertical diodes. Other embodiments include a vertical diode/silicon-controlled rectifier (SCR) string and, more particularly, a diode-triggered silicon-controlled rectifier (VDTSCR). In any case, each embodiment of the IC structure includes an N-well in a substrate and, within that N-well, a P-doped region and an N-doped region that abuts the P-doped region. The P-doped region can be anode of a vertical diode and can be electrically connected to the N-doped region (e.g., by a local interconnect or by contacts and metal wiring) such that the vertical diode is electrically connected to another vertical device (e.g., another vertical diode or a SCR with vertically-oriented features). Also disclosed is a manufacturing method that can be integrated with methods of manufacturing vertical field effect transistors (VFETs).
Public/Granted literature
- US20190229207A1 VERTICAL FIN-TYPE DEVICES AND METHODS Public/Granted day:2019-07-25
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