Invention Grant
- Patent Title: Mitigation of particle contamination for wafer dicing processes
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Application No.: US15611015Application Date: 2017-06-01
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Publication No.: US10363629B2Publication Date: 2019-07-30
- Inventor: Wei-Sheng Lei , Jungrae Park , Ajay Kumar , Brad Eaton
- Applicant: APPLIED MATERIALS, INC.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; B23K26/0622 ; H01L21/3065 ; H01L21/02 ; H01L21/308 ; H01L21/683 ; H01L21/78 ; H01L21/67 ; B23K26/06 ; B23K26/18 ; B23K26/402 ; B23K26/364 ; B23K101/42 ; B23K103/00

Abstract:
Methods of dicing semiconductor wafers are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a material layer over and between the plurality of singulated dies above the dicing tape. The method also includes expanding the dicing tape, wherein a plurality of particles is collected on the material layer during the expanding.
Public/Granted literature
- US20180345418A1 MITIGATION OF PARTICLE CONTAMINATION FOR WAFER DICING PROCESSES Public/Granted day:2018-12-06
Information query
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