A universal serial bus (USB) link bridge device is disclosed. The USB link bridge device includes a host side module configured to be interfaced with a USB host. The host side module includes a receiver and is configured to receive serial data from the USB host, convert the received serial data into parallel data and store the parallel data into an elasticity buffer. A data controller coupled to the host side module is also included. The USB link bridge device further includes a device side module coupled to the data controller and includes a transmitter. The device side module is configured to receive parallel data from the data controller and convert the received parallel data into serial data and to transmit the serial data towards a USB device. The data controller includes a first-in-first-out (FIFO) memory and a bridge state machine, the data controller is configured to receive the parallel data from the host side module, return an acknowledge signal back to the host side module, store the parallel data in the FIFO memory and transmit the parallel data from the FIFO memory based on a configuration of the bridge state machine. The bridge state machine is configured to decide when to send the parallel data from the FIFO memory toward the USB device.