Array substrates for enhancing gate driver on array (GOA) reliability
Abstract:
The present disclosure relates to an array substrate for enhancing gate driver on array (GOA) reliability. The array substrate includes dual and adjacent VSS traces in a rim. The VSS traces include a first VSS trace and a second VSS trace, and 2n number of regulation capacitors are configured between the CF_COM trace and the second VSS trace via metal material in different layers. Alternatively, a single third VSS trace is configured between the GOA circuit and the CF_COM in the active display area (AA), and 2n number of regulation capacitors are configured between the CF_COM trace and the third VSS trace via metal material in different layers. The array substrate may be adopted in the mass production of the TFT display panels.
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