Invention Grant
- Patent Title: Memory system
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Application No.: US15703070Application Date: 2017-09-13
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Publication No.: US10366749B2Publication Date: 2019-07-30
- Inventor: Marie Takada , Masanobu Shirakawa , Hiroshi Yao
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2017-060053 20170324
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C13/00 ; G11C7/10

Abstract:
A memory system according to one embodiment includes a memory device including a memory cell with a variable resistance value and a first controller, and a second controller. The first controller is configured to compare first read data read from the memory cell when a first voltage is applied to the memory cell with second read data read from the memory cell when a second voltage is applied to the memory cell. The first voltage is different from the second voltage. The first read data has a first value or a second value with the first value being different from the second value. The second read data has the first value or the second value.
Public/Granted literature
- US20180277204A1 MEMORY SYSTEM Public/Granted day:2018-09-27
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