Invention Grant
- Patent Title: Integrated circuit structure and method of forming
-
Application No.: US14928768Application Date: 2015-10-30
-
Publication No.: US10368442B2Publication Date: 2019-07-30
- Inventor: Chen-Hua Yu , Jui-Pin Hung , Kuo-Chung Yee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H01L21/683 ; H01L25/00 ; H01L23/00 ; H01L25/10 ; H01L21/56 ; H05K3/30 ; H05K3/34 ; H01L25/065 ; H01L23/31
Abstract:
An integrated circuit structure and method of forming is provided. A die is place on a substrate and encased in molding compound. A redistribution layer is formed overlying the die and the substrate is removed. One or more surface mounted devices and/or packages are connected to the redistribution layer on an opposite side of the redistribution layer from the die. The redistribution layer is connected to a printed circuit board.
Public/Granted literature
- US20160295700A1 Integrated Circuit Structure and Method of Forming Public/Granted day:2016-10-06
Information query
