Invention Grant
- Patent Title: Apparatuses and methods for single level cell caching
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Application No.: US16101951Application Date: 2018-08-13
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Publication No.: US10372369B2Publication Date: 2019-08-06
- Inventor: Daniel Doyle
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C16/30
- IPC: G11C16/30 ; G06F3/06 ; G11C16/16 ; G11C11/56 ; G11C16/10 ; G11C16/04

Abstract:
Methods and apparatuses for single level cell caching are described. According to one example, a method includes receiving, at a memory device, a first set of data to be stored in a lower page of multilevel memory cells, storing the first set of data in a page of single level memory cells, storing the first set of data in the lower page of the multilevel memory cells, receiving, at the memory device, a second set of data to be stored in an upper page of the multilevel memory cells, and storing the second set of data directly in the upper page of the multilevel memory cells.
Public/Granted literature
- US20180349055A1 APPARATUSES AND METHODS FOR SINGLE LEVEL CELL CACHING Public/Granted day:2018-12-06
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