Various aspects of the disclosed technology relate to techniques of selecting scan cells from state elements for partial scan designs. Signal probability values for logic gates in a circuit design are first determined. Based on the signal probability values, next-state capture probability values for state elements in the circuit design are computed. Based on the next-state capture probability values, scan cells are selected from the state elements. Scan cells may be further selected based on continuously-updated control weight values and observation weight values associated with the state elements.