Capacitance detecting circuit is disclosed for fingerprint sensing and other applications. The capacitance detecting circuit includes a first capacitor, an integrator, a second capacitor, a comparator, and a counter. The integrator can generate an integrating output voltage and includes a first single-ended amplifier and at least one integration capacitor. The first single-ended amplifier includes a first input terminal and an integrating output terminal. The comparator can generate a comparing output and include a negative input terminal coupled to the integrating output terminal of the first single-ended amplifier, a positive input terminal to receive a reference voltage, and a comparing output terminal to output the comparing output voltage. The counter is coupled to the comparing output terminal and can generate a counter output. A connection between the second capacitor and the first input terminal is controlled to be conducted or cutoff according to the comparing output.