A display apparatus includes: a timing control block which outputs image data based on external image data and control signals, and generates data and gate-side control signals based on the external control signal; a source drive block which converts the image data into a data voltage based on the data control signal; a low frequency detection block which detects a low power drive period based on the external control signal and generates a power control signal, a state of which is determined based on a result of the detection; an integrated chip which receives first and second drive voltages and includes a first switch block that turns off a circuit of the source drive block based on the power control signal during the low power drive period; a gate drive circuit which generates a gate signal based on a gate control signal from the integrated chip; and a display panel.