- Patent Title: Three-dimensional flash NOR memory system with configurable pins
-
Application No.: US15660552Application Date: 2017-07-26
-
Publication No.: US10373686B2Publication Date: 2019-08-06
- Inventor: Hieu Van Tran , Hung Quoc Nguyen , Mark Reiten
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: SILICON STORAGE TECHNOLOGY, INC.
- Current Assignee: SILICON STORAGE TECHNOLOGY, INC.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP US
- Main IPC: H01L25/00
- IPC: H01L25/00 ; G11C16/08 ; G11C7/10 ; G11C16/04 ; H01L23/00 ; H01L25/065 ; H01L25/18
Abstract:
A three-dimensional flash memory system is disclosed. The system comprises a memory array comprising a plurality of stacked dies, where each die comprises memory cells. The system further comprises a plurality of pins, where the function of at least some of the pins can be configured using a mechanism that selects a function for those pins from a plurality of possible functions.
Public/Granted literature
- US20170323682A1 Three-Dimensional Flash NOR Memory System With Configurable Pins Public/Granted day:2017-11-09
Information query
IPC分类:
