Invention Grant
- Patent Title: Memory system performing read of nonvolatile semiconductor memory device
-
Application No.: US15982024Application Date: 2018-05-17
-
Publication No.: US10373692B2Publication Date: 2019-08-06
- Inventor: Hiroyuki Nagashima
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-255314 20091106
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/26 ; G06F11/10 ; G11C11/56 ; G11C16/34 ; G11C16/14 ; G11C16/24 ; G06F11/34

Abstract:
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.
Public/Granted literature
- US20180268910A1 MEMORY SYSTEM Public/Granted day:2018-09-20
Information query