Invention Grant
- Patent Title: Semiconductor device source/drain region with arsenic-containing barrier region
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Application No.: US15922643Application Date: 2018-03-15
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Publication No.: US10374038B2Publication Date: 2019-08-06
- Inventor: Chien-I Kuo , Chii-Horng Li , Chia-Ling Chan , Li-Li Su , Yi-Fang Pai , Wei Te Chiang , Shao-Fu Fu , Wei Hao Lu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/08 ; H01L29/167 ; H01L29/36 ; H01L21/223 ; H01L21/02 ; H01L29/78 ; H01L29/66 ; H01L21/3065 ; H01L21/306

Abstract:
The present disclosure relates generally to an epitaxy scheme for forming source/drain regions in a semiconductor device, such as an n-channel device. In an example, a method of manufacturing a semiconductor device includes forming an active area on a substrate. The active area includes a source/drain region. The formation of the source/drain region includes forming a barrier region along a bottom surface and side surface of a recess in the active area. The barrier region includes arsenic having a first dopant concentration. The formation of the source/drain region further includes forming an epitaxial material on the barrier region in the recess. The epitaxial material includes phosphorous having a second dopant concentration.
Public/Granted literature
- US20190165100A1 SEMICONDUCTOR DEVICE SOURCE/DRAIN REGION WITH ARSENIC-CONTAINING BARRIER REGION Public/Granted day:2019-05-30
Information query
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