Invention Grant
- Patent Title: Buffer layer on semiconductor devices
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Application No.: US14303045Application Date: 2014-06-12
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Publication No.: US10374055B2Publication Date: 2019-08-06
- Inventor: Cheng-Hao Hou , Wei-Yang Lee , Xiong-Fei Yu , Kuang-Yuan Hsu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L29/49 ; H01L21/28 ; H01L29/78

Abstract:
A semiconductor device including a substrate having a source region, a drain region, and a channel region disposed between the source region and the drain region. Additionally, the semiconductor device includes a high-k dielectric layer formed over the channel region, an n-metal formed over the high-k dielectric layer and a barrier layer formed between the high-k dielectric layer and the n-metal, the barrier layer including a layer of annealed silicon.
Public/Granted literature
- US20140291777A1 BUFFER LAYER ON SEMICONDUCTOR DEVICES Public/Granted day:2014-10-02
Information query
IPC分类: