Invention Grant
- Patent Title: Transistor linearization techniques
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Application No.: US15878280Application Date: 2018-01-23
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Publication No.: US10374602B1Publication Date: 2019-08-06
- Inventor: Omid Foroudi
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H03K17/687
- IPC: H03K17/687
Abstract:
Techniques for linearizing a field effect transistor (FET) are provided. In an example, a method can include averaging a voltage at a drain node of the FET and a voltage at a source node of the FET to provide an average voltage, and applying the average voltage to a gate node of the FET.
Public/Granted literature
- US20190229725A1 TRANSISTOR LINEARIZATION TECHNIQUES Public/Granted day:2019-07-25
Information query
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