Invention Grant
- Patent Title: Controlling a performance state of a processor using a combination of package and thread hint information
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Application No.: US15252511Application Date: 2016-08-31
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Publication No.: US10379904B2Publication Date: 2019-08-13
- Inventor: Eliezer Weissmann , Israel Hirsh , Efraim Rotem , Doron Rajwan , Avinash N. Ananthakrishnan , Natanel Abitan , Ido Melamed , Guy M. Therien
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F1/32 ; G06F9/48 ; G06F9/50
Abstract:
In one embodiment, a processor includes: a first storage to store a set of common performance state request settings; a second storage to store a set of thread performance state request settings; and a controller to control a performance state of a first core based on a combination of at least one of the set of common performance state request settings and at least one of the set of thread performance state request settings. Other embodiments are described and claimed.
Public/Granted literature
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