Invention Grant
- Patent Title: Semiconductor packages and methods for forming semiconductor package
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Application No.: US15477170Application Date: 2017-04-03
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Publication No.: US10381280B2Publication Date: 2019-08-13
- Inventor: Nathapong Suthiwongsunthorn , John Ducyao Beleran , Serafin Padilla Pedron, Jr.
- Applicant: UTAC Headquarters Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UTAC HEADQUARTERS PTE. LTD.
- Current Assignee: UTAC HEADQUARTERS PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Horizon IP PTE LTD.
- Main IPC: H01L23/04
- IPC: H01L23/04 ; H01L23/00 ; B81B7/00 ; H01L23/053

Abstract:
Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.
Public/Granted literature
- US20170294401A1 SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING SEMICONDUCTOR PACKAGE Public/Granted day:2017-10-12
Information query
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