- Patent Title: Fault isolation system and method for detecting faults in a circuit
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Application No.: US15715403Application Date: 2017-09-26
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Publication No.: US10393801B2Publication Date: 2019-08-27
- Inventor: Wei-Chih Wang , Bi-Jen Chen , Hua-Sheng Chen
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G11C29/02 ; G11C29/56

Abstract:
The present invention provides a method and a fault isolation system for detecting errors in an integrated circuit. One feature of the present invention is using a movable second probe to scan and acquire an output signal through the vias or metal line structure of a diagnostic area along a detecting line, so as to find the fault location precisely, and another feature of the present invention is using a cutter in conjunction with the above method to narrow down the fault range. The cutter is used to electrically isolate the portion of diagnostic area step by step for approaching the fault location. This method can help to save a lot of analysis time and also makes the minor fault localization possible.
Public/Granted literature
- US20180017617A1 FAULT ISOLATION SYSTEM AND METHOD FOR DETECTING FAULTS IN A CIRCUIT Public/Granted day:2018-01-18
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