Invention Grant
- Patent Title: Semiconductor stack
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Application No.: US15758805Application Date: 2016-08-10
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Publication No.: US10395924B2Publication Date: 2019-08-27
- Inventor: Taro Nishiguchi , Yu Saitoh , Hirofumi Yamamoto
- Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
- Applicant Address: JP Osaka
- Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
- Current Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
- Current Assignee Address: JP Osaka
- Agency: IPUSA, PLLC
- Priority: JP2015-202024 20151013
- International Application: PCT/JP2016/073603 WO 20160810
- International Announcement: WO2017/064913 WO 20170420
- Main IPC: H01L31/0312
- IPC: H01L31/0312 ; H01L21/02 ; C30B29/00 ; H01L21/306 ; C03B25/02 ; H01L21/04 ; H01L21/205 ; H01L21/311

Abstract:
A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is famed. Density of a second recessed portion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm−2 in the epi principal surface.
Public/Granted literature
- US20190088477A1 SEMICONDUCTOR STACK Public/Granted day:2019-03-21
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