Invention Grant
- Patent Title: Clock regeneration circuit, semiconductor integrated circuit device and RF tag
-
Application No.: US15694017Application Date: 2017-09-01
-
Publication No.: US10396973B2Publication Date: 2019-08-27
- Inventor: Kouichi Kanda
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2016-177100 20160909
- Main IPC: H04L7/033
- IPC: H04L7/033 ; G06K19/077 ; H03L7/08 ; H03L7/099 ; H04B1/16 ; H04L7/04 ; H04W52/00
Abstract:
A clock regeneration circuit includes a pattern detection circuit that detects a pattern having a time interval determined in advance in an input signal, and a signal processing circuit that generates a clock by variably controlling a time interval for oscillation based on the time interval of the detected pattern.
Public/Granted literature
- US20180076950A1 CLOCK REGENERATION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND RF TAG Public/Granted day:2018-03-15
Information query
