Invention Grant
- Patent Title: System and method for processing data in an adder based circuit
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Application No.: US15017330Application Date: 2016-02-05
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Publication No.: US10402166B2Publication Date: 2019-09-03
- Inventor: Jeremy Chatwin , Jacob Adams Wysocki
- Applicant: SONY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: SONY CORPORATION
- Current Assignee: SONY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Chip Law Group
- Main IPC: G06F7/504
- IPC: G06F7/504 ; G06F7/509 ; G06F7/523

Abstract:
Various aspects of a system and method to process data in an adder based circuit, such as an integrated circuit, are disclosed herein. In accordance with an embodiment, a first addend is encoded as a first unary number. The first unary number comprises a token bit. A second addend is encoded as a second unary number. A first shift operation is performed on the token bit in the first unary number based on the second unary number. The first shift operation is performed to generate an output unary number. The generated output unary number is decoded to a number representation that corresponds to the number representation of the first addend and/or the second addend. The decoded number representation indicates a summation of the first addend and the second addend.
Public/Granted literature
- US20170228215A1 SYSTEM AND METHOD FOR PROCESSING DATA IN AN ADDER BASED CIRCUIT Public/Granted day:2017-08-10
Information query
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