Technologies are described for re-configurable non-volatile memory structures and systems for FPGA, as well as, non-volatile static random access memory (nvSRAM) cells with multiple non-volatile memory (NVM) bits. Proposed structures may quickly switch/reconfigure look-up tables (LUTs) and/or reconfigure FPGA routings. Memory structures according to some embodiments may reduce the switching/reconfiguring times to one or a few clock cycles. Thus, fast or real time FPGA reconfiguration is enabled, one LUT may serve multiple functions, thereby, a fraction of current FPGAs may be used to perform multi-functions, which may substantially reduce FPGA chip areas. Structures according to embodiments may further provide simple routing for entire system by re-configuration and enhanced data security by avoiding external data transmission.