Invention Grant
- Patent Title: Methods, systems, and computer program products for implementing an electronic design with electrical analyses with compensation circuit components
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Application No.: US15093619Application Date: 2016-04-07
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Publication No.: US10402532B1Publication Date: 2019-09-03
- Inventor: Yujia Li , Xiaohai Wu , An-Chang Deng
- Applicant: Cadence Design Systems, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Various techniques implement an electronic design with electrical analyzes with compensation circuit components. A power pin of a power net may be identified in an electronic design. The electronic design may be reduced into a reduced electronic design at least by applying one or more circuit reduction techniques to at least a portion of the electronic design. At least one load device of a plurality of load devices in the reduced electronic design may be transformed into a transformed load device. One or more design closure tasks may be performed on the electronic design using at least the reduced electronic design and the transformed load device.
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