Apparatus for memory device testing and field applications
Abstract:
A memory test system is disclosed that includes a memory integrated circuit (IC) and a memory functional tester. The memory IC includes a plurality of memory banks, where each memory bank includes a plurality of memory cells. The memory functional tester includes an adjustable voltage generator circuit, a read current measurement circuit, and a controller. The memory functional tester performs a write/read functional test on the memory bank over a number of write control voltages to determine a preferred write control voltage, where the preferred write control voltage is designated for use during subsequent write operations to the memory bank during an operational mode.
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