Invention Grant
- Patent Title: Semiconductor die singulation methods
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Application No.: US16141019Application Date: 2018-09-25
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Publication No.: US10403544B2Publication Date: 2019-09-03
- Inventor: Michael John Seddon
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: IPTechLaw
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/033 ; H01L21/306 ; H01L21/304 ; H01L21/683 ; H01L21/66 ; H01L23/00 ; H01L21/56 ; H01L21/3065 ; H01L23/31

Abstract:
Implementations of a method of singulating a plurality of die may include: providing a semiconductor wafer including a plurality of die located on a first side of the semiconductor wafer where the plurality of die include a desired thickness. The method may include etching a plurality of trenches into the semiconductor wafer only from the first side of the semiconductor wafer where the plurality of trenches is located adjacent to a perimeter of the plurality of die. A depth of the plurality of trenches may be greater than the desired thickness of the plurality of die. The method may also include mounting the first side of the semiconductor wafer to a backgrinding tape. The method may also include thinning a second side of the semiconductor wafer to a predetermined distance to the depth of the plurality of trenches to singulate the plurality of die.
Public/Granted literature
- US20190080965A1 SEMICONDUCTOR DIE SINGULATION METHODS Public/Granted day:2019-03-14
Information query
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