Invention Grant
- Patent Title: 3D NAND device with five-folded memory stack structure configuration
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Application No.: US15874099Application Date: 2018-01-18
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Publication No.: US10403632B2Publication Date: 2019-09-03
- Inventor: Hiroyuki Ogawa , Hiroyuki Tanaka
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/528 ; H01L27/11519 ; H01L27/11556 ; H01L27/11565 ; H01L27/11582

Abstract:
A three-dimensional semiconductor device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures extending through the alternating stack and arranged in at least five rows that extend along a first horizontal direction, contact via structures arranged in a same number of rows as the memory stack structures and overlying the memory stack structures, each of the contact via structures being electrically connected to a semiconductor channel of a respective memory stack structure, bit lines contacting a respective contact via structure and extending along a second horizontal direction that is different from the first horizontal direction, and a pair of wall-shaped via structures extending through the alternating stack and laterally extending along the first horizontal direction.
Public/Granted literature
- US20180158834A1 3D NAND DEVICE WITH FIVE-FOLDED MEMORY STACK STRUCTURE CONFIGURATION Public/Granted day:2018-06-07
Information query
IPC分类: