Invention Grant
- Patent Title: Clock synchronization method and apparatus
-
Application No.: US15353764Application Date: 2016-11-17
-
Publication No.: US10404393B2Publication Date: 2019-09-03
- Inventor: Young Mok Ha , Eun Ji Pak , Tae Ho Kim
- Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Applicant Address: KR Daejeon
- Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Current Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Current Assignee Address: KR Daejeon
- Agency: LRK Patent Law Firm
- Priority: KR10-2015-0162035 20151118
- Main IPC: H04J3/06
- IPC: H04J3/06 ; H04L7/00

Abstract:
A clock synchronization apparatus and method, which perform clock synchronization by determining a clock offset and a network delay between a master and a slave in an IEEE 1588 system. The clock synchronization method and apparatus include observing a clock offset and a packet delay using a timing packet received from a master node; estimating a clock offset and a packet delay from the observed clock offset and the observed packet delay; and performing synchronization with the master node based on the clock offset and the packet delay.
Public/Granted literature
- US20170141865A1 CLOCK SYNCHRONIZATION METHOD AND APPARATUS Public/Granted day:2017-05-18
Information query