Invention Grant
- Patent Title: Power semiconductor packages having a substrate with two or more metal layers and one or more polymer-based insulating layers for separating the metal layers
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Application No.: US15833310Application Date: 2017-12-06
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Publication No.: US10410952B2Publication Date: 2019-09-10
- Inventor: Reinhold Bayerer
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/373 ; H01L23/538 ; H01L23/498 ; H01L23/50 ; H01L21/768 ; H01L23/367 ; H01L23/34
Abstract:
Power semiconductor packages described herein each include a substrate having two or more metal layers and one or more insulating layers for separating the metal layers. The substrate insulating layers are formed from a polymer material to reduce the CTE mismatch between the substrate metal layers and the substrate insulating layers.
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