Invention Grant
- Patent Title: Methods of programming different portions of memory cells of a string of series-connected memory cells
-
Application No.: US15569854Application Date: 2017-08-28
-
Publication No.: US10418106B2Publication Date: 2019-09-17
- Inventor: Ke Liang , Jun Xu
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- International Application: PCT/CN2017/099234 WO 20170828
- International Announcement: WO2019/041082 WO 20190307
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/04 ; G11C16/34 ; G11C16/26 ; G11C16/14

Abstract:
Methods include programming a first portion of memory cells of a string of series-connected memory cells closer to a particular end of the string than a second portion of memory cells of the string in an order from a different end of the string to the particular end, and programming the second portion of memory cells in an order from the particular end to the different end. Methods further include incrementing a first read count and a second read count in response to performing a read operation on a memory cell of a block of memory cells, resetting the first read count in response to performing an erase operation on a first portion of memory cells of the block of memory cells, and resetting the second read count in response to performing an erase operation on the second portion of memory cells of the block of memory cells.
Public/Granted literature
- US20190066787A1 MEMORY ARCHITECTURE AND OPERATION Public/Granted day:2019-02-28
Information query