Invention Grant
- Patent Title: External connection pad for semiconductor device package
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Application No.: US15801108Application Date: 2017-11-01
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Publication No.: US10418314B2Publication Date: 2019-09-17
- Inventor: Wen-Long Lu
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Agent Cliff Z. Liu
- Main IPC: H01L23/12
- IPC: H01L23/12 ; H01L21/00 ; H01L23/498 ; H01L23/00 ; H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L23/528 ; H01L23/48 ; H01L23/522

Abstract:
At least some embodiments of the present disclosure relate to a substrate for packaging a semiconductor device. The substrate includes a first dielectric layer having a first surface and a second surface opposite to the first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer, a second patterned conductive layer adjacent to the second surface of the first dielectric layer and electrically connected to the first patterned conductive layer, and an external connection pad tapered from a top surface to a bottom surface. The second patterned conductive layer includes a pad and a trace adjacent to the pad. The external connection pad is disposed on the pad of the second patterned conductive layer. A bottom width of the external connection pad is greater than or equal to a width of the pad of the second patterned conductive layer.
Public/Granted literature
- US20190131231A1 SEMICONDUCTOR DEVICE PACKAGE AND A METHOD OF MANUFACTURING THE SAME Public/Granted day:2019-05-02
Information query
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