Invention Grant
- Patent Title: 3D packaging method for semiconductor components
-
Application No.: US16020702Application Date: 2018-06-27
-
Publication No.: US10418339B2Publication Date: 2019-09-17
- Inventor: Fabrice Duval , Fumihiro Inoue
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: McDonnell Boehnen Hullbert & Berghoff LLP
- Priority: EP17178490 20170628
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00 ; H01L21/768 ; H01L21/56

Abstract:
The present disclosure relates to a method for bonding semiconductor components. A semiconductor component comprising microbumps on a planar bonding surface is prepared for bonding by applying a photosensitive polymer layer on the bonding surface. The average thickness of the initial polymer layer in between the microbumps is similar to the average height of the microbumps. In a lithography process, the polymer is removed from the upper surface of the microbumps and from areas around the microbumps. The polymer is heated to a temperature at which the polymer flows, resulting in a polymer layer that closely adjoins the microbumps, without exceeding the microbump height. The closely adjoining polymer layer may have a degree of planarity substantially similar to a planarized layer.
Public/Granted literature
- US20190006301A1 3D Packaging Method for Semiconductor Components Public/Granted day:2019-01-03
Information query
IPC分类: