Invention Grant
- Patent Title: Array substrate and fabrication method thereof, display panel
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Application No.: US16018956Application Date: 2018-06-26
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Publication No.: US10418385B2Publication Date: 2019-09-17
- Inventor: Tianyi Wu , Jun Ma , Tianqing Hu
- Applicant: Shanghai Tianma Micro-Electronics Co., Ltd. , Tianma Micro-Electronics Co., Ltd.
- Applicant Address: CN Shanghai CN Shenzhen
- Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.,Tianma Micro-Electronics Co., Ltd.
- Current Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.,Tianma Micro-Electronics Co., Ltd.
- Current Assignee Address: CN Shanghai CN Shenzhen
- Agency: Anova Law Group, PLLC
- Priority: CN201611025995 20161118
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/786 ; H01L29/423 ; H01L29/417 ; G09G3/20 ; G09G3/3233 ; G09G3/3258 ; G09G3/3266 ; G11C19/28

Abstract:
An array substrate, a display panel, and a fabrication method of the array-substrate are provided. The array substrate comprises a first thin film transistor including a first metal oxide thin film transistor and disposed in a display region, a second thin film transistor including an amorphous silicon thin film transistor and disposed in a peripheral circuit region; and a third thin film transistor including a second metal oxide thin film transistor and disposed in the peripheral circuit region. A first insulating layer is disposed between a first metal oxide semiconductor layer and a first gate electrode, and a second insulating layer is disposed above the first gate electrode, a second gate electrode, and the first metal oxide semiconductor layer. The amorphous silicon semiconductor layer, a first source electrode, a first drain electrode, a second source electrode, a second drain electrode are disposed above the second insulating layer.
Public/Granted literature
- US20180308871A1 ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, DISPLAY PANEL Public/Granted day:2018-10-25
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