Invention Grant
- Patent Title: Method and structure for reducing switching power losses
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Application No.: US15789831Application Date: 2017-10-20
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Publication No.: US10418481B2Publication Date: 2019-09-17
- Inventor: Dev Alok Girdhar
- Applicant: Intersil Americas LLC
- Applicant Address: US CA Milpitas
- Assignee: Intersil Americas LLC
- Current Assignee: Intersil Americas LLC
- Current Assignee Address: US CA Milpitas
- Agency: Foley & Lardner LLP
- Main IPC: H01L31/113
- IPC: H01L31/113 ; H01L29/10 ; H01L29/08 ; H01L29/78 ; H01L29/06 ; H01L29/40 ; H01L29/423 ; H01L29/66
Abstract:
One embodiment is directed towards a method. The method includes forming a drift region of a first conductivity type above or in a substrate. The substrate has first and second surfaces. A first insulator is formed over a first portion of the channel, and which has a first thickness. A second insulator is formed over the second portion of the channel, and which has a second thickness that is less than the first thickness. A first gate is formed over the first insulator. A second gate is formed over the second insulator. A body region of a second conductivity type is formed above or in the substrate.
Public/Granted literature
- US20180040728A1 METHOD AND STRUCTURE FOR REDUCING SWITCHING POWER LOSSES Public/Granted day:2018-02-08
Information query
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