Invention Grant
- Patent Title: Interposer with high bandwidth connections between a central processor and memory
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Application No.: US16288891Application Date: 2019-02-28
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Publication No.: US10423544B2Publication Date: 2019-09-24
- Inventor: Morgan Johnson , Frederick G. Weiss
- Applicant: MORGAN / WEISS TECHNOLOGIES INC.
- Applicant Address: US OR Beaverton
- Assignee: MORGAN / WEISS TECHNOLOGIES INC.
- Current Assignee: MORGAN / WEISS TECHNOLOGIES INC.
- Current Assignee Address: US OR Beaverton
- Agency: Miller Nash Graham & Dunn LLP
- Main IPC: H05K7/00
- IPC: H05K7/00 ; G06F13/16 ; G06F1/32 ; H05K1/02 ; H01L23/32 ; H05K1/11 ; H05K1/14 ; H05K1/18 ; H01L23/498 ; G06F13/40 ; G11C5/04

Abstract:
An apparatus includes a processor having an array of processor interconnects arranged to connect the processor to conductive paths, a circuit substrate having an array of circuit interconnects arranged to provide connections between the processor and the circuit substrate, the circuit substrate having conductive paths connected to the array of circuit interconnects, an interposer substrate arranged between the processor and the circuit substrate, at least one conductive trace in the interposer substrate in connection with at least one processor interconnect in the array of interconnects on the processor, the conductive trace arranged at least partially parallel to the interposer substrate such that no electrical connection exists between the conductive trace in the interposer substrate and a corresponding one of the circuit interconnects on the circuit substrate, and at least one peripheral circuit connected to the at least one conductive trace.
Public/Granted literature
- US20190196985A1 INTERPOSER WITH HIGH BANDWIDTH CONNECTIONS BETWEEN A CENTRAL PROCESSOR AND MEMORY Public/Granted day:2019-06-27
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