Invention Grant
- Patent Title: Control method for memory device
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Application No.: US15910410Application Date: 2018-03-02
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Publication No.: US10424348B2Publication Date: 2019-09-24
- Inventor: Ryota Suzuki , Tatsuo Izumi
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JP2017-173233 20170908
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C5/14 ; G11C11/56 ; G11C29/50 ; H01L27/115 ; G11C16/08 ; G11C16/12 ; G11C16/30 ; G11C16/34 ; G11C8/08 ; G11C16/04 ; G11C16/32

Abstract:
According to one embodiment, a method of controlling a memory device includes supplying a second potential having a first value to a second electrode and simultaneously, or thereafter, supplying a third potential to a third electrode, and thereafter stopping supply of the third potential such that the potential of the third electrode decays while reducing the potential of the second electrode, and thereafter supplying a first potential to the first electrode.
Public/Granted literature
- US20190080727A1 CONTROL METHOD FOR MEMORY DEVICE Public/Granted day:2019-03-14
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