- Patent Title: Bias control circuit with distributed architecture for memory cells
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Application No.: US15870486Application Date: 2018-01-12
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Publication No.: US10424358B2Publication Date: 2019-09-24
- Inventor: Supraja Sundaresan , Sung-en Wang , Khin Htoo , Primit Modi
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: Foley & Lardner LLP
- Main IPC: G11C5/14
- IPC: G11C5/14 ; G11C11/16 ; G11C13/00 ; G11C16/08 ; G11C16/30 ; G11C11/22 ; G11C8/08
Abstract:
Disclosed is a device including a selected distributed driver, a first feedback control circuit, and a second feedback control circuit. The first feedback control circuit is coupled to the selected distributed driver. The first feedback control circuit is configured to maintain an output of the selected distributed driver within a first predetermined range. The second feedback control circuit is selectively coupled to the selected distributed driver and is configured to maintain the output of the selected distributed driver to be within a second predetermined range. The second predetermined range is within the first predetermined range.
Public/Granted literature
- US20180358069A1 BIAS CONTROL CIRCUIT WITH DISTRIBUTED ARCHITECTURE FOR MEMORY CELLS Public/Granted day:2018-12-13
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