Invention Grant
- Patent Title: Sub 59 MV/decade SI CMOS compatible tunnel FET as footer transistor for power gating
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Application No.: US15276768Application Date: 2016-09-26
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Publication No.: US10424581B2Publication Date: 2019-09-24
- Inventor: Titash Rakshit , Mark Rodder , Rwik Sengupta
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Lewis Roca Rothgerber Christie LLP
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/66 ; H01L21/8238 ; H01L29/167 ; H01L23/522 ; H01L23/528 ; H01L29/739 ; H01L29/08 ; H01L29/165 ; H01L27/06
Abstract:
An integrated circuit (IC) including a circuit block including a plurality of complementary metal oxide semiconductor field-effect transistors (CMOSFETs), and a tunnel field-effect transistor (TFET) between the circuit block and ground for power gating the circuit block.
Public/Granted literature
- US20170301672A1 SUB 59 MV / DECADE SI CMOS COMPATIBLE TUNNEL FET AS FOOTER TRANSISTOR FOR POWER GATING Public/Granted day:2017-10-19
Information query
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