Semiconductor memory devices having an undercut source/drain region
Abstract:
A semiconductor memory device includes, for example, a substrate having a fin having a web portion extending from the substrate and a first overhanging fin portion extending outward from the web portion and spaced from the substrate, the fin comprising a source/drain region in the web portion of the fin, a first source/drain region in the first overhanging fin portion, an isolation material surrounding the web portion and disposed under the first overhanging fin portion of the fin, an upper surface of the isolation material being below an upper surface of the fin, a first gate disposed over the fin between the source/drain region in the web portion of the fin and the first source/drain region in the first overhanging fin portion of the fin, and a capacitor operably electrically connected to the first source/drain region in the first overhanging fin portion.
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