Invention Grant
- Patent Title: Resistive memory architectures with multiple memory cells per access device
-
Application No.: US15976462Application Date: 2018-05-10
-
Publication No.: US10424729B2Publication Date: 2019-09-24
- Inventor: Jun Liu , Michael P. Violette
- Applicant: Ovonyx MemoryTechnology, LLC
- Applicant Address: US VA Alexandria
- Assignee: Ovonyx Memory Technology, Inc.
- Current Assignee: Ovonyx Memory Technology, Inc.
- Current Assignee Address: US VA Alexandria
- Agency: Holland & Hart LLP
- Main IPC: H01L45/00
- IPC: H01L45/00 ; G11C13/00 ; H01L27/24

Abstract:
A resistive memory structure, for example, phase change memory structure, includes one access device and two or more resistive memory cells. Each memory cell is coupled to a rectifying device to prevent parallel leak current from flowing through non-selected memory cells. In an array of resistive memory bit structures, resistive memory cells from different memory bit structures are stacked and share rectifying devices.
Public/Granted literature
- US20180337330A1 RESISTIVE MEMORY ARCHITECTURES WITH MULTIPLE MEMORY CELLS PER ACCESS DEVICE Public/Granted day:2018-11-22
Information query
IPC分类: