Invention Grant
- Patent Title: Systems and methods for dynamic low latency optimization
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Application No.: US15469781Application Date: 2017-03-27
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Publication No.: US10430245B2Publication Date: 2019-10-01
- Inventor: Chun Chung Lo
- Applicant: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
- Applicant Address: HK Shatin
- Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
- Current Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
- Current Assignee Address: HK Shatin
- Agency: Norton Rose Fulbright US LLP
- Main IPC: G06F9/50
- IPC: G06F9/50 ; G06F9/48

Abstract:
Systems and methods which provide low latency optimization configured to perform from the hardware layer across the operating system to an application. Low latency operation implemented in accordance with embodiments is optimized for a specific application, which interfaces with specific hardware, executing on a host processor-based system configured for low latency optimization according to the concepts herein. For example, a low latency optimization implementation may comprise various modules implemented in both the user space and Kernel space, wherein the modules cooperate to obtain information regarding the services and hardware utilized by an application and to provide such information for facilitating low latency operation with respect to the application. In operation according to embodiments, low latency operation is dynamically enabled or disabled by a low latency optimization implementation, such as to facilitate low latency operation on an application by application basis as appropriate or as desired.
Public/Granted literature
- US20180276047A1 SYSTEMS AND METHODS FOR DYNAMIC LOW LATENCY OPTIMIZATION Public/Granted day:2018-09-27
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