Invention Grant
- Patent Title: Vanishable logic to enhance circuit security
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Application No.: US15290871Application Date: 2016-10-11
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Publication No.: US10430618B2Publication Date: 2019-10-01
- Inventor: Houman Homayoun , Hamid Mahmoodi
- Applicant: George Mason University
- Applicant Address: US VA Fairfax
- Assignee: GEORGE MASON UNIVERSITY
- Current Assignee: GEORGE MASON UNIVERSITY
- Current Assignee Address: US VA Fairfax
- Agency: Ballard Spahr LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F21/87 ; G06F21/76

Abstract:
Provided are methods, systems, devices of a security-driven design method. The present methods and systems can enable integration of security requirements in the early stages of design along with other design constrains so that potential attacks during IC development, usage, and retirement would render ineffectual. Example methods and systems can comprise circuits and circuit design using vanishable logic through a novel hybrid design method. An example method or system can comprise vanishable logic based on hardware re-configuration and transformation by employing non-volatile memory cells.
Public/Granted literature
- US20170103236A1 Vanishable Logic To Enhance Circuit Security Public/Granted day:2017-04-13
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