Invention Grant
- Patent Title: Multi-pass rendering in a screen space pipeline
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Application No.: US14952400Application Date: 2015-11-25
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Publication No.: US10430989B2Publication Date: 2019-10-01
- Inventor: Ziyad Hakura , Cynthia Allison , Dale Kirkland , Jeffrey Bolz , Yury Uralsky , Jonah Alben
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06T17/00
- IPC: G06T17/00 ; G06T15/00 ; G06T11/40

Abstract:
A multi-pass unit interoperates with a device driver to configure a screen space pipeline to perform multiple processing passes with buffered graphics primitives. The multi-pass unit receives primitive data and state bundles from the device driver. The primitive data includes a graphics primitive and a primitive mask. The primitive mask indicates the specific passes when the graphics primitive should be processed. The state bundles include one or more state settings and a state mask. The state mask indicates the specific passes where the state settings should be applied. The primitives and state settings are interleaved. For a given pass, the multi-pass unit extracts the interleaved state settings for that pass and configures the screen space pipeline according to those state settings. The multi-pass unit also extracts the interleaved graphics primitives to be processed in that pass. Then, the multi-pass unit causes the screen space pipeline to process those graphics primitives.
Public/Granted literature
- US20170148204A1 MULTI-PASS RENDERING IN A SCREEN SPACE PIPELINE Public/Granted day:2017-05-25
Information query
IPC分类:
G | 物理 |
G06 | 计算;推算或计数 |
G06T | 一般的图像数据处理或产生 |
G06T17/00 | 用于计算机制图的3D建模 |