Invention Grant
- Patent Title: Nonvolatile memory and writing method
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Application No.: US16286056Application Date: 2019-02-26
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Publication No.: US10431298B2Publication Date: 2019-10-01
- Inventor: Tokumasa Hara , Noboru Shibata
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2014-055408 20140318; JP2014-083044 20140414
- Main IPC: G11C11/56
- IPC: G11C11/56 ; G11C16/04

Abstract:
According to one embodiment, three bits stored in one memory cell of a nonvolatile memory correspond to three pages. In first page writing, a threshold voltage becomes within a first or second region base on a bit value. In second page writing, if being within the first region, it becomes within the first or fourth region; and if being within the second region, it becomes within the second or third region. In the third page writing, if being within the first region, it becomes within the first or sixth region; if being within the second region, it becomes within the second or seventh region; if being within the third region, it becomes within the third or eighth region; and if being within the fourth region, it becomes within the fourth or fifth region.
Public/Granted literature
- US20190189201A1 NONVOLATILE MEMORY AND WRITING METHOD Public/Granted day:2019-06-20
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