According to one embodiment, a semiconductor memory includes includes conductors, a pillar through the conductors, a controller. The pillar includes a first pillar portion, a second pillar portion, and a joint portion between the first pillar portion and the second pillar portion. Each of the portions where the pillar and the conductors cross functions as a transistor. Among the conductors through the first pillar portion, the conductor most proximal to the joint portion and one of the other conductors respectively function as a first dummy word line and a first word line. Among the conductors through the second pillar portion, the conductor most proximal to the joint portion and one of the other conductors respectively function as a second dummy word line and a second word line.