- Patent Title: Grouping memory cells into sub-blocks for program speed uniformity
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Application No.: US15923064Application Date: 2018-03-16
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Publication No.: US10431313B2Publication Date: 2019-10-01
- Inventor: Zhengyi Zhang , Yingda Dong , James Kai , Johann Alsmeier
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Vierra Magen Marcus LLP
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/34 ; G11C16/10 ; G11C16/28

Abstract:
A three-dimensional stacked memory device is configured to provide uniform programming speeds of different sets of memory strings formed in memory holes. In a process for removing sacrificial material from word line layers, a block oxide layer in the memory holes is etched away relatively more when the memory hole is relatively closer to an edge of the word line layers where an etchant is introduced. A thinner block oxide layer is associated with a faster programming speed. To compensate, memory strings at the edges of the word line layers are programmed together, separate from the programming of interior memory strings. A program operation can use a higher initial program voltage for programming the interior memory strings compared to the edge memory strings.
Public/Granted literature
- US20180240527A1 GROUPING MEMORY CELLS INTO SUB-BLOCKS FOR PROGRAM SPEED UNIFORMITY Public/Granted day:2018-08-23
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