The embodiment of the present disclosure discloses a method of packaging a chip and a chip package structure. the method of packaging the chip includes: mounting at least one chip to be packaged and at least one electrically conductive module on a carrier, wherein the at least one chip to be packaged has a back surface facing upwards and an active surface facing towards the carrier, and the at least one electrically conductive module is in the vicinity of the at least one chip to be packaged; forming a first encapsulation layer, wherein the first encapsulation layer covers the entire carrier for encapsulating the at least one chip to be packaged and the at least one electrically conductive module; detaching the carrier to expose the active surface of the at least one chip to be packaged and a first surface of the at least one electrically conductive module; and completing the packaging by a rewiring process on the active surface of the at least one chip to be packaged and the first surface of the at least one electrically conductive module. The present disclosure reduces the difficulty of packaging a chip by mounting the active surface of a chip to be packaged and an electrically conductive module on a carrier and thus saves the cost of packaging.